Job Title : Physical Design Engineers
Experience : 5 - 7 Years
Job Location : U.S(San Jose, San Diego)
Position exist at all levels.
Skills :
Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing,
synthesis and STA, Static timing analysis,Synopsys ICC, ASIC Implementation, P&R, Cadence encounter, RTL to GDS, RTL to GDSI
Interested professionals can mail your resume to priyank.srivastava@roljobs.com
Regards,
Priyanka Srivastava
Tel : 080-42821618
Leaders in Social Media Recruitment
Showing posts with label SOC encounter. Show all posts
Showing posts with label SOC encounter. Show all posts
Monday, April 16, 2012
Thursday, April 5, 2012
Physical Design Engineer @ USA
Job Title : Physical Design Professionals
Experience : 3- 8 Years
Job Location : San Deigo & San Jose (California)
Skills :
Physical Design,RTL Design,DFT,Design For Testability,ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing,
synthesis and STA, Static timing analysis,Synopsys ICC, ASIC Implementation, P&R, Cadence encounter, RTL to GDS, RTL to GDSII.
Mail your resume to priyank.srivastava@roljobs.com with the following details:
Priyanka Srivastava,
Roland & Associates,
www.roljobs.net,
Contact us at 080-42821618
Experience : 3- 8 Years
Job Location : San Deigo & San Jose (California)
Skills :
Physical Design,RTL Design,DFT,Design For Testability,ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing,
synthesis and STA, Static timing analysis,Synopsys ICC, ASIC Implementation, P&R, Cadence encounter, RTL to GDS, RTL to GDSII.
Mail your resume to priyank.srivastava@roljobs.com with the following details:
Priyanka Srivastava,
Roland & Associates,
www.roljobs.net,
Contact us at 080-42821618
Thursday, March 29, 2012
Onsite opportunity for Physical Design Engineers
Job Title : Physical Design Professionals
Experience : 3- 8 Years
Job Location : San Deigo & San Jose (California)
Skills :
Physical Design,RTL Design,DFT,Design For Testability,ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing,
synthesis and STA, Static timing analysis,Synopsys ICC, ASIC Implementation, P&R, Cadence encounter, RTL to GDS, RTL to GDSII.
Mail your resume to priyank.srivastava@roljobs.com with the following details:
Priyanka Srivastava,
Roland & Associates,
www.roljobs.net,
Contact us at 080-42821618
Experience : 3- 8 Years
Job Location : San Deigo & San Jose (California)
Skills :
Physical Design,RTL Design,DFT,Design For Testability,ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing,
synthesis and STA, Static timing analysis,Synopsys ICC, ASIC Implementation, P&R, Cadence encounter, RTL to GDS, RTL to GDSII.
Mail your resume to priyank.srivastava@roljobs.com with the following details:
Priyanka Srivastava,
Roland & Associates,
www.roljobs.net,
Contact us at 080-42821618
Subscribe to:
Posts (Atom)