Should have worked on SOC / ASIC level verification on at least one project with constrained random methodology (eRM / VMM / OVM)
Proficiency in System Verilog is a must.
Strong domain knowledge on one or more of PCIe, USB, Ethernet, ARM, AHB / AXI, AMBA, PHY Layer is a must
Must be expert in building a verification environment with any of the above methodology, writing and debugging test cases.
Should be able to enhance the Verification Coverage, Code coverage & Functional Coverage.
Working knowledge of any one scripting language like Perl, Python, Unix Make, Unix Shell Scripts etc. is an added advantage.
Candidate should be holding a valid H1B visa
Interested System Verilog experts please share your resume to prejith@roljobs.com
Regards
Prejith SS
Team Roland
080 - 42821606
Proficiency in System Verilog is a must.
Strong domain knowledge on one or more of PCIe, USB, Ethernet, ARM, AHB / AXI, AMBA, PHY Layer is a must
Must be expert in building a verification environment with any of the above methodology, writing and debugging test cases.
Should be able to enhance the Verification Coverage, Code coverage & Functional Coverage.
Working knowledge of any one scripting language like Perl, Python, Unix Make, Unix Shell Scripts etc. is an added advantage.
Candidate should be holding a valid H1B visa
Interested System Verilog experts please share your resume to prejith@roljobs.com
Regards
Prejith SS
Team Roland
080 - 42821606
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