Standard Cell Layout Engineer at Bangalore

Standard Cell Layout Engineer 


Exp : 2 - 5 Years 
Location : Bangalore 

·         To design and develop layouts for

1.       Standard cells for basic cells to complex cells

2.        SRAM compiler and full custom memories (macro/ block/leaf cells)

·         Should have understanding of standard cell architecture, layout challenges in high density and performance libraries.

·         Should have understanding of different memory architectures

·         Experience and familiarity in various physical verification checks – DRC, LVS, ERC, EM, etc.

·         Should have understanding and working knowledge of good layout practices for lower process nodes 22nm, 28nm and 45nm.

·         Good understanding of deep sub-micron and DFM issues in layout design.

·         Thorough working knowledge of layout design and physical verification tools - Cadence Virtuoso layout suite, Mentor Calibre, Synopsys Hercules etc.

·         Responsible for timely and quality execution of layout design

Preferable to have good knowledge of scripting languages – Perl, skill and shell etc


Mail your resume to priyank.srivastava@roljobs.com

Regards,
Priyanka Srivastava
Tel : 080-42821619
Roland & Associates (Leaders In Social Media Recruitment )