Dear Professionals,
Interested professional can mail/send your updated profile - ramyaj@roljobs.com
Position :
Physical design
Experience : 3-9
Years
Location : Bangalore, Hyderabad &
Canada
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Successful implementation of multimillion gate SoC designs in 65nm,45nm,28nm technologies
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Should be capable of handling block of 1M plus place able instances
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Hands on experience in complete Netlist to GDS implementation on high frequency design
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Hands-On expertise in flip-chip designs
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Work on all aspects of physical design including synthesis, IO ring creation, Bump placement , floor planning, place and route, clock distribution, IP integration, extraction, timing closure, power and signal integrity analysis, physical verification, DFM, and tape out
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Expertise in executing hierarchical designs - Floor planning, Partitioning, Budgeting, Integration and Signoff
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Expertise in Signoff - STA with Crosstalk and OCV, IR - Static and Dynamic, Physical Verification Closure.
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Low Power expertise - UPF/CPF based Floor planning and Optimization
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Logic synthesis is a plus
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Scripting skills (TCL/Perl/Shell) is a mustPlease also can refer some of your friends/colleagues for the same, Also can share some of the contacts for the relevant position.Regards,Ramyaramyaj@roljobs.com080 42821603
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