Job Requirements:
Location:Bangalore
Experience :4- 8 Years
Education :B E / B Tech / M Tech / M S (Electronics & communication / VLSI / Electronic & Electrical)
Designation: Sr Design Engineer
JOB SUMMARY:
4-8 years experience in Design and verifying sophisticated analog & mixed-signal blocks for CDR, PLL. ADC, DAC, SERDES.
JOB DETAILS:
Lead design and implementation of high speed interface circuit
Design projects include high speed transceivers and high frequency PLLs
Design, simulation and verification of analog & mixed-signal circuits
Provide floor plan and layout guidelines
Solve challenges of circuit design in deep submicron CMOS
Extensive design experience in Tx, Rx, CDR, PLL for high speed IO interfaces
In-depth understanding of deep submicron CMOS process and related circuit design issues.
Experience in silicon bring-up & debugging
Knowledge in system level timing budget, signal integrity, and power integrity.
Working knowledge of Cadence custom design tools
Participate and be a key contributor in block & chip level architectures.
Assist in architecture, layout, integration, bring-up, post silicon debugging, and characterization.
Generate design review documentation.
Interface with other design team members and provide directions to layout and other design engineers, ensuring that electrical performance meets specifications and requirements.
Fully proficient in understanding of industry communication standards and test equipment tools.
Professionals interested in exploring this opportunity, Can revert with your updated profile to swapna.mohan@roljobs.com
Thanks & Regards,
Swapna Mohan,
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