Job Description:-
Experience using Synopsys ICC, Magma Talus, Cadence Encounter, Mentor Olympus or Atoptech tools
Successful tape out experience of multiple complex chips (10M+ gates) at 65 or 45 nm
Expertise in floor planning,Physical Synthesis, CTS, Routing
Knowledge of low power flow (powergating, multi-Vt, voltage islands, dynamic voltage scaling, body biasing, etc.)
Email your resume to saku@roljobs.com
Thanks & Regards,
Saku
Experience using Synopsys ICC, Magma Talus, Cadence Encounter, Mentor Olympus or Atoptech tools
Successful tape out experience of multiple complex chips (10M+ gates) at 65 or 45 nm
Expertise in floor planning,Physical Synthesis, CTS, Routing
Knowledge of low power flow (powergating, multi-Vt, voltage islands, dynamic voltage scaling, body biasing, etc.)
Email your resume to saku@roljobs.com
Thanks & Regards,
Saku
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