US based Semiconductor MNC Hiring for DFT Engineer @ bangalore mail me to lijith@roljobs.com

Hi,

We have opening with one of our Client for DFT Engineer.

Location: Chennai
Experience: 2 to 8 years

Position : DFT Engineer

Must have prior full-chip DFT leadership experience handling large complex ASIC/SoC and should have handled at least one SoC tapeout.
Should have hands-on experience with scan synthesis, scan DRC fixing, MBIST, LBIST, JTAG (IEEE 1149.1), On-chip scan compression techniques.
Block level and Chip level ATPG, fault coverage improvements (aiming > 99% coverage) and simulation with timing, At-speed testing, transition and path delay ATPG.
Excellent debugging skills – scan failures/blockage, DFT DRC failures, timing (setup/hold) failures for scan paths, signature analysis.
Formal verification of DFT inserted netlists.
Expertise in industry standard EDA tools for test such as DFT Advisor, Fastscan/TestKompress, TetraMax, DFT compiler
Excellent analytical and communication skills
Experience in working with sites located in different parts of the world.
Hard working , dedicated and a passionate team player with innovation attributes.

Professionals Interested in exploring the opportunity can revert to lijith@roljobs.com

Thanks & Regards,
Lijith V V
Roland & Associates -Leaders in Social Media Recruitment.